(kicad_pcb
	(version 20241229)
	(generator "pcbnew")
	(generator_version "9.0")
	(general
		(thickness 1.6)
		(legacy_teardrops no)
	)
	(paper "A4")
	(layers
		(0 "F.Cu" signal)
		(2 "B.Cu" signal)
		(9 "F.Adhes" user "F.Adhesive")
		(11 "B.Adhes" user "B.Adhesive")
		(13 "F.Paste" user)
		(15 "B.Paste" user)
		(5 "F.SilkS" user "F.Silkscreen")
		(7 "B.SilkS" user "B.Silkscreen")
		(1 "F.Mask" user)
		(3 "B.Mask" user)
		(17 "Dwgs.User" user "User.Drawings")
		(19 "Cmts.User" user "User.Comments")
		(21 "Eco1.User" user "User.Eco1")
		(23 "Eco2.User" user "User.Eco2")
		(25 "Edge.Cuts" user)
		(27 "Margin" user)
		(31 "F.CrtYd" user "F.Courtyard")
		(29 "B.CrtYd" user "B.Courtyard")
		(35 "F.Fab" user)
		(33 "B.Fab" user)
		(39 "User.1" user)
		(41 "User.2" user)
		(43 "User.3" user)
		(45 "User.4" user)
	)
	(setup
		(pad_to_mask_clearance 0)
		(allow_soldermask_bridges_in_footprints no)
		(tenting front back)
		(pcbplotparams
			(layerselection 0x00000000_00000000_55555555_5755f5ff)
			(plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000)
			(disableapertmacros no)
			(usegerberextensions no)
			(usegerberattributes yes)
			(usegerberadvancedattributes yes)
			(creategerberjobfile yes)
			(dashed_line_dash_ratio 12.000000)
			(dashed_line_gap_ratio 3.000000)
			(svgprecision 4)
			(plotframeref no)
			(mode 1)
			(useauxorigin no)
			(hpglpennumber 1)
			(hpglpenspeed 20)
			(hpglpendiameter 15.000000)
			(pdf_front_fp_property_popups yes)
			(pdf_back_fp_property_popups yes)
			(pdf_metadata yes)
			(pdf_single_document no)
			(dxfpolygonmode yes)
			(dxfimperialunits yes)
			(dxfusepcbnewfont yes)
			(psnegative no)
			(psa4output no)
			(plot_black_and_white yes)
			(sketchpadsonfab no)
			(plotpadnumbers no)
			(hidednponfab no)
			(sketchdnponfab yes)
			(crossoutdnponfab yes)
			(subtractmaskfromsilk no)
			(outputformat 1)
			(mirror no)
			(drillshape 1)
			(scaleselection 1)
			(outputdirectory "")
		)
	)
	(net 0 "")
	(net 1 "/Sreset_0V9")
	(net 2 "/vgxp")
	(net 3 "/Senable_0V9")
	(net 4 "/Chip1_Sout_0V9")
	(net 5 "/Sin_0V9")
	(net 6 "/vgxn")
	(net 7 "/Chip2_vd_sense")
	(net 8 "GND")
	(net 9 "/vg")
	(net 10 "/Chip2_Sout_0V9")
	(net 11 "/Chip2_vd_force")
	(net 12 "/Chip1_vd_sense")
	(net 13 "/Sclkp_0V9")
	(net 14 "/Chip2_vs_sense")
	(net 15 "/Chip1_vd_force")
	(net 16 "/VDDA")
	(net 17 "/Supdate_0V9")
	(net 18 "/Chip2_vs_force")
	(net 19 "/Sclkn_0V9")
	(net 20 "/VDDD")
	(net 21 "/Chip1_vs_sense")
	(net 22 "/vb")
	(net 23 "/VDD18")
	(net 24 "/VSSA")
	(net 25 "/VSSD")
	(net 26 "/Chip1_vs_force")
	(footprint "Downloaded parts:AMPHENOL_D25P24A4PA00LF"
		(layer "F.Cu")
		(at 135 110)
		(property "Reference" "J1"
			(at -23.59 -7.635 0)
			(layer "F.SilkS")
		)
		(property "Value" "D25P24A4PA00LF"
			(at -12.16 7.615 0)
			(layer "F.Fab")
		)
		(property "Datasheet" ""
			(at 0 0 0)
			(layer "F.Fab")
			(hide yes)
		)
		(property "Description" ""
			(at 0 0 0)
			(layer "F.Fab")
			(hide yes)
		)
		(property "PARTREV" "K"
			(at 0 0 0)
			(unlocked yes)
			(layer "F.Fab")
			(hide yes)
		)
		(property "STANDARD" "Manufacturer Recommendations"
			(at 0 0 0)
			(unlocked yes)
			(layer "F.Fab")
			(hide yes)
		)
		(property "MAXIMUM_PACKAGE_HEIGHT" "12.05 mm"
			(at 0 0 0)
			(unlocked yes)
			(layer "F.Fab")
			(hide yes)
		)
		(property "MANUFACTURER" "Amphenol"
			(at 0 0 0)
			(unlocked yes)
			(layer "F.Fab")
			(hide yes)
		)
		(sheetname "/")
		(sheetfile "cryo_pdk_dsub_flip_board_v1.kicad_sch")
		(attr through_hole)
		(pad "1" thru_hole rect
			(at -16.56 -1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 9 "/vg")
			(pinfunction "1")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "2" thru_hole circle
			(at -13.8 -1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 6 "/vgxn")
			(pinfunction "2")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "3" thru_hole circle
			(at -11.04 -1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 2 "/vgxp")
			(pinfunction "3")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "4" thru_hole circle
			(at -8.28 -1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 12 "/Chip1_vd_sense")
			(pinfunction "4")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "5" thru_hole circle
			(at -5.52 -1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 21 "/Chip1_vs_sense")
			(pinfunction "5")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "6" thru_hole circle
			(at -2.76 -1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 15 "/Chip1_vd_force")
			(pinfunction "6")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "7" thru_hole circle
			(at 0 -1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 26 "/Chip1_vs_force")
			(pinfunction "7")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "8" thru_hole circle
			(at 2.76 -1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 17 "/Supdate_0V9")
			(pinfunction "8")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "9" thru_hole circle
			(at 5.52 -1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 1 "/Sreset_0V9")
			(pinfunction "9")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "10" thru_hole circle
			(at 8.28 -1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 13 "/Sclkp_0V9")
			(pinfunction "10")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "11" thru_hole circle
			(at 11.04 -1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 19 "/Sclkn_0V9")
			(pinfunction "11")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "12" thru_hole circle
			(at 13.8 -1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 3 "/Senable_0V9")
			(pinfunction "12")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "13" thru_hole circle
			(at 16.56 -1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 5 "/Sin_0V9")
			(pinfunction "13")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "14" thru_hole circle
			(at -15.18 1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 20 "/VDDD")
			(pinfunction "14")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "15" thru_hole circle
			(at -12.42 1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 25 "/VSSD")
			(pinfunction "15")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "16" thru_hole circle
			(at -9.66 1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 7 "/Chip2_vd_sense")
			(pinfunction "16")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "17" thru_hole circle
			(at -6.9 1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 14 "/Chip2_vs_sense")
			(pinfunction "17")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "18" thru_hole circle
			(at -4.14 1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 11 "/Chip2_vd_force")
			(pinfunction "18")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "19" thru_hole circle
			(at -1.38 1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 18 "/Chip2_vs_force")
			(pinfunction "19")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "20" thru_hole circle
			(at 1.38 1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 22 "/vb")
			(pinfunction "20")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "21" thru_hole circle
			(at 4.14 1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 23 "/VDD18")
			(pinfunction "21")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "22" thru_hole circle
			(at 6.9 1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 16 "/VDDA")
			(pinfunction "22")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "23" thru_hole circle
			(at 9.66 1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 24 "/VSSA")
			(pinfunction "23")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "24" thru_hole circle
			(at 12.42 1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 10 "/Chip2_Sout_0V9")
			(pinfunction "24")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "25" thru_hole circle
			(at 15.18 1.42)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 4 "/Chip1_Sout_0V9")
			(pinfunction "25")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "SH1" thru_hole circle
			(at -23.52 0)
			(size 4.216 4.216)
			(drill 3.2)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 8 "GND")
			(pinfunction "SHIELD")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "SH2" thru_hole circle
			(at 23.52 0)
			(size 4.216 4.216)
			(drill 3.2)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 8 "GND")
			(pinfunction "SHIELD__1")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(embedded_fonts no)
		(model "${KIPRJMOD}/D25P24A4PA00LF/D25P24A4PA00LF.step"
			(offset
				(xyz 0 0 6)
			)
			(scale
				(xyz 1 1 1)
			)
			(rotate
				(xyz -0 -0 -180)
			)
		)
	)
	(footprint "Downloaded parts:AMPHENOL_D25P24A4PA00LF"
		(layer "B.Cu")
		(at 135 90 180)
		(property "Reference" "J2"
			(at -23.59 7.635 0)
			(layer "B.SilkS")
		)
		(property "Value" "D25P24A4PA00LF"
			(at -12.16 -7.615 0)
			(layer "B.Fab")
		)
		(property "Datasheet" ""
			(at 0 0 0)
			(layer "B.Fab")
			(hide yes)
		)
		(property "Description" ""
			(at 0 0 0)
			(layer "B.Fab")
			(hide yes)
		)
		(property "PARTREV" "K"
			(at 0 0 0)
			(unlocked yes)
			(layer "B.Fab")
			(hide yes)
		)
		(property "STANDARD" "Manufacturer Recommendations"
			(at 0 0 0)
			(unlocked yes)
			(layer "B.Fab")
			(hide yes)
		)
		(property "MAXIMUM_PACKAGE_HEIGHT" "12.05 mm"
			(at 0 0 0)
			(unlocked yes)
			(layer "B.Fab")
			(hide yes)
		)
		(property "MANUFACTURER" "Amphenol"
			(at 0 0 0)
			(unlocked yes)
			(layer "B.Fab")
			(hide yes)
		)
		(sheetname "/")
		(sheetfile "cryo_pdk_dsub_flip_board_v1.kicad_sch")
		(attr through_hole)
		(pad "1" thru_hole rect
			(at -16.56 1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 5 "/Sin_0V9")
			(pinfunction "1")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "2" thru_hole circle
			(at -13.8 1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 3 "/Senable_0V9")
			(pinfunction "2")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "3" thru_hole circle
			(at -11.04 1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 19 "/Sclkn_0V9")
			(pinfunction "3")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "4" thru_hole circle
			(at -8.28 1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 13 "/Sclkp_0V9")
			(pinfunction "4")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "5" thru_hole circle
			(at -5.52 1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 1 "/Sreset_0V9")
			(pinfunction "5")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "6" thru_hole circle
			(at -2.76 1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 17 "/Supdate_0V9")
			(pinfunction "6")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "7" thru_hole circle
			(at 0 1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 26 "/Chip1_vs_force")
			(pinfunction "7")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "8" thru_hole circle
			(at 2.76 1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 15 "/Chip1_vd_force")
			(pinfunction "8")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "9" thru_hole circle
			(at 5.52 1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 21 "/Chip1_vs_sense")
			(pinfunction "9")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "10" thru_hole circle
			(at 8.28 1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 12 "/Chip1_vd_sense")
			(pinfunction "10")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "11" thru_hole circle
			(at 11.04 1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 2 "/vgxp")
			(pinfunction "11")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "12" thru_hole circle
			(at 13.8 1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 6 "/vgxn")
			(pinfunction "12")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "13" thru_hole circle
			(at 16.56 1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 9 "/vg")
			(pinfunction "13")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "14" thru_hole circle
			(at -15.18 -1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 4 "/Chip1_Sout_0V9")
			(pinfunction "14")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "15" thru_hole circle
			(at -12.42 -1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 10 "/Chip2_Sout_0V9")
			(pinfunction "15")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "16" thru_hole circle
			(at -9.66 -1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 24 "/VSSA")
			(pinfunction "16")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "17" thru_hole circle
			(at -6.9 -1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 16 "/VDDA")
			(pinfunction "17")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "18" thru_hole circle
			(at -4.14 -1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 23 "/VDD18")
			(pinfunction "18")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "19" thru_hole circle
			(at -1.38 -1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 22 "/vb")
			(pinfunction "19")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "20" thru_hole circle
			(at 1.38 -1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 18 "/Chip2_vs_force")
			(pinfunction "20")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "21" thru_hole circle
			(at 4.14 -1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 11 "/Chip2_vd_force")
			(pinfunction "21")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "22" thru_hole circle
			(at 6.9 -1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 14 "/Chip2_vs_sense")
			(pinfunction "22")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "23" thru_hole circle
			(at 9.66 -1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 7 "/Chip2_vd_sense")
			(pinfunction "23")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "24" thru_hole circle
			(at 12.42 -1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 25 "/VSSD")
			(pinfunction "24")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "25" thru_hole circle
			(at 15.18 -1.42 180)
			(size 1.408 1.408)
			(drill 0.9)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 20 "/VDDD")
			(pinfunction "25")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "SH1" thru_hole circle
			(at -23.52 0 180)
			(size 4.216 4.216)
			(drill 3.2)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 8 "GND")
			(pinfunction "SHIELD")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(pad "SH2" thru_hole circle
			(at 23.52 0 180)
			(size 4.216 4.216)
			(drill 3.2)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 8 "GND")
			(pinfunction "SHIELD__1")
			(pintype "passive")
			(solder_mask_margin 0.102)
		)
		(embedded_fonts no)
		(model "${KIPRJMOD}/D25P24A4PA00LF/D25P24A4PA00LF.step"
			(offset
				(xyz 0 0 6)
			)
			(scale
				(xyz 1 1 1)
			)
			(rotate
				(xyz -0 -0 -180)
			)
		)
	)
	(gr_rect
		(start 100 80)
		(end 170 120)
		(fill no)
		(layer "Edge.Cuts")
	)
	(gr_text "D-sub reflection board v1\nA.K.A {dblquote}Mock flange{dblquote}\nB.L. 2026-02-16"
		(at 107.696 115.062 90)
		(layer "F.SilkS")
	)
	(gr_text "This side to Arduino board"
		(at 114.808 98.552 0)
		(layer "F.SilkS")
	)
	(gr_text "This side to ASIC board"
		(at 152.654 103.378 0)
		(layer "B.SilkS")
	)
	(zone
		(net 8)
		(net_name "GND")
		(layer "B.Cu")
		(hatch edge 0.5)
		(connect_pads
			(clearance 0.5)
		)
		(min_thickness 0.25)
		(filled_areas_thickness no)
		(fill yes
			(thermal_gap 0.5)
			(thermal_bridge_width 0.5)
		)
		(polygon
			(pts
				(xy 100.076 80.01) (xy 100.076 119.888) (xy 169.926 119.888) (xy 169.926 80.01)
			)
		)
	)
	(embedded_fonts no)
)
